Linear Design Features - LTJournal-V20N2-07-di-LTM9003-Todd_Nelson

Tiny Digital Predistortion Receiver Integrates RF, Filter and ADC Todd Nelson

Figure 1. Digital predistortion signal chain TRANSMIT PATH

The power amplifier (PA) consumes more electrical

PA DAC DSP

power than any other block in a cellular basestation and is therefore a significant ADC DPD factor in the operating

FEEDBACK PATH

expense for the service provider. Complex digital

directly from the PA specifications and filtering and avoid other frequencies that

modulation requires

some are optimized at design time. are already fixed based on specification

extremely high linearity

requirements. The sample rate is similarly

from the PA, so it must be The baseband transmit signal is upcon-

chosen as a multiple of the digital modu-

driven well below saturation verted to the carrier frequency and is

lation chip rate, for example, 3.84MHz

defined in frequency by the air interface

where it is most efficient. in WCDMA. Finally, the Nyquist theorem

standard: WCDMA, TD-SCDMA, CDMA2000,

To improve PA efficiency, dictates that the sample rate must be

LTE, etc. Since the purpose of the DPD loop

designers use digital at least twice the sampled bandwidth.

is to measure the PA transfer function,

Although many configurations are accept-

techniques to reduce the

it is not necessary to separate the car-

able, one that meets these constraints is

crest factor and improve PA riers or demodulate the digital data.

an IF of 184.32MHz, an ADC sample rate of

linearity, allowing it to run PA nonlinearity produces odd order

245.76MHz and a bandwidth of 122.88MHz.

closer to saturation. Digital intermodulation products which consti- tute spectral regrowth in the adjacent and In the case of a 20W PA, the average output

predistortion (DPD) has

alternate channels. Third-order products power is 43d Bm. The peak to average

emerged as the preferred

appear within a range of three times the ratio (PAR) is about 15d Bm. To set the

method of PA linearization.

bandwidth of the desired channel (see average input power to the mixer of the

A great deal of focus is paid

Figure 2). Likewise, fifth-order products receive chain at –15d Bm, the combination

to the DPD algorithm but appear within a range of five times the of the coupler and attenuator insertion another critical element is bandwidth and seventh-order prod- loss needs to be 58d B (refer to Figure 1).

the RF feedback receiver. ucts within seven times the bandwidth. The in-band noise of the PA is specified Therefore, the DPD receiver must acquire by the WCDMA standard at a maximum

DPD RECEIVER REQUIREMENTS a multiple of the transmit bandwidth of –13d Bm/MHz (–73d Bm/Hz). Therefore, The DPD receiver converts the PA out- equivalent to the order of the inter- the combination of the coupler and put from RF back to digital as part of a modulation products being linearized. attenuation (–58d B) and the PA noise limit feedback loop (see Figure 1). Key design (–13d Bm/MHz) yields a receiver sensitiv-

The trend in current development is to

requirements are the input frequency ity level that must be below –71d Bm/MHz

mix the desired channel to an intermedi-

range and power level, the intermedi- (–131d Bm/Hz). For sufficient margin, a

ate frequency (IF) and capture the full

ate frequency and the bandwidth to number at least 6d B to 10d B better than

bandwidth of all the intermodulation

be digitized. Some of these are derived this is desirable. This sets the frequency

products. The exact IF is chosen to ease

30 | July 2010 : LT Journal of Analog Innovation